Design For Test Engineer

Description:

We are partnered up with a well-established Semiconductor Artifical intelligent chip manufacture that creates AI hardware and software platforms for edge computing who are looking for Test Engineer to work remote within Europe.

Requirements

• Experience coding SystemVerilog RTL, TCL, and/or Perl
• Proficient in Unix/Linux environments
• Core DFT skills considered crucial for this position should include some of the following: hierarchical scan, Scan compression and insertion, Memory BIST, JTAG/IJTAG, at-speed test, ATPG, fault simulation, back-annotated gate-level verification and silicon debug
• Fluent in English, both in speaking and writing

Desirable Experience

• Desirable Experience and skillsFamiliarity with IEEE 1149, 1500, 1687
• Synthesis
• Static Timing Analysis
• Working knowledge of Siemens DFT tools