Description:
    
The GPU STA team at Qualcomm is responsible for evaluating block-level and top-level timing to ensure optimal performance and power efficiency in advanced GPUs. As a GPU STA Engineer, you will conduct static timing analysis on synthesized and PNR netlists, provide feedback to RTL and Physical Design teams to improve PPA, collaborate with cross-functional teams to meet timing constraints, and implement timing ECOs to resolve violations. Your role is crucial in developing high-performance, low-power graphics solutions that drive the future of technology.
You Will Be Responsible For
You will be member of team developing chip signoff methodology and flow:
 
	- Enhancing STA and PDN / Timing technologies for design closure methodology with unique challenges driven by Low power architecture, Si Variation, Low voltage operation and other challenges.
 
	- Driving accuracy of timing closure and static/dynamic flows to reduce turn around time
 
	- Statistical analysis techniques Moments, LVF models generation and qualification
 
	- Automation for timing and power data mining and processing
 
	- Participating in project proposal development including key milestones and deliverables
 
	- Executing and deliver project goals in a timely manner with production support
 
	- Resolving issues in all phases of development to assure smooth project execution
	
	  
We Would Love To See
 
	- Expertise in Primetime, Primeshield and Tempus based, hierarchical analysis for large SoCs
 
	- Expertise in Redhawk SC for flow development of static/dynamic/DVD
 
	- Hands on Tweaker, Tempus ECO and PTECO for timing closure
 
	- Highly Proficient in Python, TCL and Perl
 
	- Interest in Design for Parametric Yield is an added advantage.
 
	- Comfortable with extraction, simulation tools and environments is a plus
 
	- Excellent problem-solving skills and results-driven, able to work and drive practical solutions under research environment.
 
	- Good communication skill and personal skills in a multi-disciplinary, fast-paced engineering environment
 
	- Minimum Qualification Master’s of Computer Engineering or Electrical Engineering
 
	- 3+ years industrial work experience.