Principal Verification Engineer

Description:

A leading semiconductor IP organisation is looking to hire a Principal Verification Engineer to support the development of high-performance memory controller IP used across data-intensive and next-generation compute applications.

As a Principal Verification Engineer You Will

• Define and architect scalable UVM-based verification environments for complex controller IP
• Develop self-checking testbenches, scoreboards, and coverage models to support metric-driven verification
• Create and deploy assertions for both simulation and formal verification flows
• Own and maintain verification plans, ensuring alignment between specification and coverage targets
• Drive regression strategy and automation in collaboration with CAD/flow teams
• Work closely with RTL designers to debug and resolve challenging corner-case scenarios
• Contribute to technical reviews and quality processes across the development lifecycle